Who am I?
- Name: Utkarsh Mathur
- Date of birth: 27 January 1994
- Phone: +1 (919)-349-6756
- Location: Raleigh, NC
- Email: email@example.com
- Latest CV:
I am a Master's student pursuing Electrical and Computer Engineering at NC State University, Raleigh.
I have worked at Cadence Design Systems for two years in the field of Verification IP (VIP) for protocols like HDMI, I2C, MHL and USB type-C.
I am currently researching in the field of computer architecture with special interests in high-performance microarchitecture, General Purpose Computation on Graphics Processors (GPGPU), and architectural support for security.
What I'm best at
Skills & Knowledge
LanguagesC/C++, CUDA, Verilog, SystemVerilog, Python, Assembly for RISC-V, Java, PHP, HTML, SQL, CQL
PackagesGPGPU-sim, 721sim (cycle-accurate RISC-V superscalar simulator), MATLAB, ModelSim, Synopsys Design Vision, LaTeX
MethodologiesUVM ( Universal Verification Methodology )
Version ControlClearCase, Perforce, GIT.
Operating SystemsUnix/Linux ❤, Windows.
FPGAPapilio Pro (Spartan 6)
ControllersdsPIC30 and dsPIC33 family, and ATmega328
Development BoardsArduino, Raspberry Pi and Galileo board.
My Professional Background
2018May - Present
NC State University
- Architectural support for mitigating timing based side channel attacks on GPUs under Prof. Huiyang Zhou
- High performance micro-architectural support for load latency hiding in modern superscalar CPUs under Prof. Eric Rotenberg
2015October - 2017July
Cadence Design Systems
- Development in Verification IP for the protocols HDMI, MHL & I2c
- Co-created a component-based methodology with the aim to have more scalable and flexible architecture of Verification IPs and reduced time to market
- Created features like Consumer Electronics Control (CEC) Physical Layer, adDDC from scratch
2015July - 2015October
Cadence Design Systems
R&D Intern at Cadence Design Systems, Noida for HDMI VIP
- Learnt various methodologies and trained in tools like ClearCase for Code Version Control
- Tested HDMI verification IP and fixed major performance-related bugs
Click to browse through more Work Experience
2014May - 2014August
(Defence R&D Organization)
- Developed Data Logger using BL2120 SBC to replace their old firmware and increased recording time by a factor of 10
- Designed schematic layout for data logging systems using dsPIC33F microcontroller for analyzing data recorded by various sensors during free fall to improve parachute designs
- Invented a model for non-contact distance measurement of objects using Image Processing to help them determine terminal velocity of freely falling payloads
2014March - 2014April
- Taught undergraduate level image processing for Robovito. Managed responsibility for lectures, workshops, and project
2013June - 2013July
NaMPET LaboratoryIIT Kanpur
- Developed a software suite in assembly language for the DSP processor TMS320F2812 & incorporated a package of routines to implement any filter of Order 2
- Enabled production of 50Hz three phase sinusoids with various control mechanisms for consistent voltage